I2C ("I squared C", although IIC would have been more adequate) stands for Inter-Integrated-Circuit and is a simple synchronous communication protocol that uses just two wires and allows up to 128 devices to be connected.
But how does this work?
We have two signals: SCL (Serial Clock Line) , which is used to synchronize the transmission, and SDA (Serial Data Acceptance), or the actual line through which bits are transferred.
Data is only valid during the high period of the clock and changes state when the clock is low (the SCL line is always held low by the device with the longest low period).
The master (note:there can be more than one, and it's not a fixed status: some slave devices, if they have the capability, can become masters themselves when needed) starts the communication (or transaction) by sending a start bit - which corresponds to the falling edge on SDA while SCL is logic high - followed by the 7-bit address of the slave it wants to communicate with
(that's why we can connect 128 devices: 27=128). Last comes the read/write bit, which is HIGH if the master wants to read to the slave or LOW if it wants to write to it.
The actual data transfer starts now, one byte at a time (starting with the most significant bit) with each byte followed by an ACK (ACKnowledged) or NACK (Not ACKnowledged) - note that, contrary to what one might think, ACK is logic LOW while NACK is HIGH, and that's because the "active" rule for I2C communication is the LOW signal, since normally lines are pulled high by resistors; in fact, a broken devices would be naturally pulled to an HIGH state, effectively communicating a NACK signal.
The master will then end the transmission by using a stop bit and switching SCL high before switching SDA high.
Image from www.rfwireless-world.com
Summing it up, the transaction goes like this: start bit, slave address (7-bit), read/write bit, ACK/NACK. After that, any number of bytes can be sent from master to slave (or viceversa), with each byte followed by ACK or NACK (where they can assume different meaning, for example the master can use a NACK to tell a slave it wants to cmmunicate with another device), and a final stop bit.
In fact, the I2C protocol allows for a repeated start condition, i.e. when the master initiates a transaction with a start bit then initiates a new transaction via another start bit without an intervening stop bit. This can be used, for example, in a situation where there are multiple masters and the communication needs two or more transactions to be concluded effectively, say when asking for the content in a specific register (one transaction) and then reading the content (another transaction): between these operations the line is released and another master can claim it, thus distrupting the communication.
This is avoided by a process called arbitration, done thanks to the open-drain configuration of the I2C protocol: if a master tries to drive the signal HIGH and another tries LOW, the one driving LOW wins and the loser detects the logic mismatch, abandoning its transmission.
Image from www.allaboutcircuits.com
👉For further exploring the hardware part of the I2C you can refer to the awesome article on AllAboutCircuits.com.
If you want to suggest something, or find any error, please don't esitate to leave a comment 👇, I'll be glad to hear from you 😉
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